The team aims to design a commercial-like digital storage oscilloscope. The oscilloscope have two channels with a maximum sampling rate of 10 MS/s. The scope features some basic waveform analysis, have multiple triggering modes, and allows the user to choose which form of interpolation will be used to display the waveform. The team designed a GUI that displays the waveform data. The GUI features independently configurable cursors and independently configurable time/voltage scales for each channel. The GUI is displayed on a screen integrated into the system and driven by the FPGA. Intel's Cyclone V SoC FPGA is used to control data acquisition, analyze data, and display the GUI on the screen properly.